Intel¡¯s Moorestown Initial Features Leaked Before Official Launch in 2009 ÀÎÅÚÀº ¹«¾îÀÇ Ãʱ⠱â´ÉÀÌ À¯ÃâµÈ 2009 ³â Àü¿¡ °ø½Ä Ãâ¹ü

It has been a while since Intel talked about its Moorestown platform which appeared in the roadmap after the Silverthorne as ultra low power silicon dedicated for UMPC (Ultra Mobile PC) and MID (Mobile Internet Device) market, but it seems that the available information is very limited to public. ÀÌÈÄ ÀÎÅÚ ·Îµå¸Ê¿¡ ±Øµµ·Î ³·Àº Àü·Â ½Ç¸®ÄÜ ½Ç¹ö´Â UMPC (¿ïÆ®¶ó ¸ð¹ÙÀÏ PC)ÀÇ MID (¸ð¹ÙÀÏ ÀÎÅÍ³Ý ±â±â)¿¡ ´ëÇÑ ½ÃÀåÀÇ µîÀåÀº ¹«¾î ÈÄ Ç÷§Æû Çå½Å¿¡ ´ëÇØ ¾ê±â Á» ¿À·¡µÆ´ÙÁö¸¸, ±×°Í¿¡ ÇØ´çÇÏ´Â Á¤º¸°¡ º¸Àδ٠´ëÁß¿¡°Ô ¸Å¿ì Á¦ÇѵǾîÀÖ´Ù. Now more information has been disclosed and some of the manufacturers could have started to align their roadmap accordingly. Áö±ÝÀº ´õ ¸¹Àº Á¤º¸¸¦ °ø°³µÇ¾ú½À´Ï´Ù°ú ÀϺΠÁ¦Á¶ ¾÷üÀÇ ½ÃÀÛÀÌ ¼ö¿¡ µû¶ó ÀÚ½ÅÀÇ ·Îµå¸ÊÀ» ¸ÂÃ߽ʽÿÀ.

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Moorestown is believed to consist of two silicons; Linroft and Langwell. ¹«¾î µÎ °¡Áö·Î ÀÌ·ç¾îÁ®ÀÖ´Ù silicons; Linroft°ú Langwell. You may wonder what all these special names are about. ¸ðµÎ ´Ù ´ç½ÅÀÌ Æ¯º°ÇÑ À̸§¿¡ ´ëÇØÀÌ ¹«¾ùÀÎÁö ±Ã±ÝÇÏ´Ù ¼öÀÖ½À´Ï´Ù. There are just some codenames being used by the giant chip maker for the processor as well as chipset differentiation. ±×³É ¸î °¡Áö ¾ÏÈ£¸í °Å´ë Ĩ Á¦Á¶ÇÏ¿© ÇÁ·Î¼¼¼­¿¡ ´ëÇÑ Â÷º°»Ó¸¸ ¾Æ´Ï¶ó Ĩ¼Â »ç¿ëµÇ°íÀÖ½À´Ï´Ù. Lincroft is the CPU or the successor of Silverthorne, a 45 nm process technology fabricated processor whereas Langwell is the IO chip that provides interconnects to external peripherals. ¹ÝÇØ Langwell°¡ Á¦°øÇÏ´Â ÀÔÃâ·Â ĨÀ»ÀÌ´Ù LincroftÀÇ CPU ¶Ç´Â ½Ç¹ö, 45 ³ª³ë °øÁ¤ ±â¼úÀ» ÇÁ·Î¼¼¼­ Á¶ÀÛÀÇ ÈİèÀÚ°¡ ¿ÜºÎ ÁÖº¯ ±â±â¸¦ »óÈ£ ¿¬°áÇÕ´Ï´Ù. Langwell is expected to combine all the controller hubs inclusive of memory controller as well as graphics accelerator into single chips. ¸ðµç ÄÁÆ®·Ñ·¯¿¡ °áÇÕÇÒ ¿¹Á¤ÀÌ´Ù Langwell ¸Þ¸ð¸® ÄÁÆ®·Ñ·¯ÀÇ ´ÜÀÏ Ä¨¿¡ ±×·¡ÇÈ °¡¼Ó±â¸¦ Æ÷ÇÔ»Ó¸¸ ¾Æ´Ï¶ó Çãºê. Some advanced features such as DDR3 memory controller, PCI Express, USB and Serial ATA are also in the list. ¸ñ·Ïµµ¿¡ DDR3 ¸Þ¸ð¸® ÄÁÆ®·Ñ·¯, PCI ÀͽºÇÁ·¹½º, USB ¹× Á÷·Ä ATA¿Í °°Àº ÀϺΠ°í±Þ ±â´ÉÀ»ÇÕ´Ï´Ù.

Interestingly, the architecture will change quite significantly with the DMI bus replacing current FSB (Front side bus) for processor and chipset just like what will be implemented in Nahelem. Èï¹Ì·Ó°Ôµµ, ÇöÀçÀÇ FSB ¹ö½º ¾ÆÅ°ÅØÃ³¸¦ ¸Å¿ì Å©°Ô DMI ¹«½¼ Nahelem¿¡ ±¸Çö µÉó·³ ÇÁ·Î¼¼¼­¿Í Ĩ¼Â¿¡ ´ëÇÑ (ÇÁ·ÐÆ® »çÀÌµå ¹ö½º) ±³Ã¼¿Í ÇÔ²² º¯°æµË´Ï´Ù. More importantly, the performance per watt will scale up significantly since the total power is believe to be only one fifth of Silverthorne processor. ´õ Áß¿äÇÑ °ÍÀº, ¿ÍÆ® ´ç ¼º´ÉÀ» ȹ±âÀûÀ¸·Î Àüü Àü·Â ÀÌÈÄ ÃÖ´ë ±Ô¸ðÀÌ´Ù ½Ç¹ö ÇÁ·Î¼¼¼­ÀÇ À¯ÀÏÇÑ 5 µîµµ ÇÒ ¹Ï½À´Ï´Ù. Latest roadmap information showed that the Moorestown platform will be available to market by mid of 2009. ÃֽŠ·Îµå¸Ê Á¤º¸¸¦ ±× ¹«¾î Ç÷§ÆûÀ» ½ÃÀå¿¡ 2009 ³â Á߹ݿ¡ ÀÇÇØ »ç¿ëÇÒ ¼öÀÖ´Ù.

IMPORTANT : This is a machine translated page which is provided "as is" without warranty. Áß¿ä :ÀÌ ±â°è´Â "º¸Áõµµ¾øÀÌÀÖ´Â ±×´ë·Î"Á¦°øµË´Ï´Ù ÆäÀÌÁö¸¦ ¹ø¿ªÇß´Ù. Machine translation may be difficult to understand. ±â°è ¹ø¿ªÀ» ÀÌÇØÇϱ⠾î·Á¿ï ¼öÀÖ½À´Ï´Ù. Please refer to À» ÂüÁ¶ÇϽñ⠹ٶø´Ï´Ù original English article ¿ø·¡ ¿µ¾î ¹®¼­ whenever possible. ¾ðÁ¦µç °¡´ÉÇÕ´Ï´Ù.

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